Xilinx Hiring Freshers/Exp as Design Engineer - B.Tech,M.Tech - July 2013

Company Name:        Xilinx

Company Website:    www.xilinx.com

Qualification:            B.Tech,M.Tech

Experience:               0 - 4 Years

Location:                  Across India

Job Role:                  Design Engineer


Job Description:

Xilinx Hiring Freshers/Exp as Design Engineer - B.Tech,M.Tech - July 2013

Responsibilities:

> Participate in the design and enhancements of the PCIExpress IP core

> Participate in the development and maintenance of a high quality robust IP environment to deliver to the end customer

> Participate in the RTL verification and hardware testing

> Create and maintain IP delivery mechanisms using Xilinx internal delivery tools

> Create documentation (data sheets, user guides, application notes, etc) for IP blocks

> Assist software engineering (or other dependent groups) during the integration phase of projects and debug flow problems

> Assist engineering management and marketing to specify future IP products and future product enhancements

> Assist in developing product rollout plans, schedule timelines, dependencies, etc

Required Skills:

> B.Tech

> 0-4 years experience

> Excellent oral and written communications skills

> Excellent knowledge of Digital design concepts and problem solving skills

> Good exposure to RTL coding using Verilog or VHDL

> Very good knowledge on OOPs concepts and advanced verification techniques

> Working knowledge on verification components such as BFMs, checkers, monitors and scoreboards

> Working experience with various EDA tools

> Working knowledge of any of the scripting languages such as tcl and perl

> Working knowledge of Linux/Unix operating systems and shell scripting

> Ability to learn new languages, protocols and verification methodologies fast enough

Desired Profile:

> M.Tech

> Knowledge of serial I/O protocols such as PCI Express

> Good knowledge of the HVLs such as System Verilog and Vera

> Good working knowledge on any of the advanced verification methodologies such as OVM, VMM, eRM or RVM

> Knowledge of SVA

See More: 
https://xapps9.xilinx.com/OA_HTML/OA.jsp?page=/oracle/apps/irc/candidateSelfService/webui/VisVacDispPG&OAHP=IRC_EXT_SITE_VISITOR_APPL&OASF=IRC_VIS_VAC_DISPLAY&&transactionid=1512068663&p_svid=97687&p_spid=NULL&oapc=3&oas=O6t4YrBn_Mu2uKem81wV1Q..